EDN

High-level synthesis package speeds design

The Synphony HLS high-level synthesis package integrates M-language and model-based synthesis and is said to yield up to 10 times higher design and verification productivity than traditional RTL flows ...
Nature

High-Level Synthesis and Design Space Exploration

High-Level Synthesis (HLS) has emerged as a pivotal technology in the transformation of algorithmic descriptions into efficient hardware designs. Coupled with Design Space Exploration (DSE), HLS ...
Semiconductor Engineering

How The Productivity Advantages Of High-Level Synthesis Can Improve IP Design, Verification, And Reuse

Engineering teams are under more pressure than ever before—systems on chip (SoCs) are growing more complex and design schedules are increasingly tighter. With its productivity advantages, high-level ...
Electronic Design

In Adding Control-Logic Support, A High-Level Synthesis Tool Goes Full Chip

High-level synthesis (HLS), or the notion of synthesizing a design into RTL from a higher level of abstraction, has been gaining currency among design teams. For some time now, there have been ...
Electronic Design

Synopsys Jumps Into ESL-Synthesis Pool

Synopsys's Synphony high-level synthesis (HLS) tool takes in algorithmic expressions of functionality written in The MathWorks' Matlab (M) language and outputs RTL that is optimized for timing, area, ...