Semiconductor Engineering

SVT (Six Stacked Vertical Transistors) SRAM Cell Architecture Introduction: Design And Process Challenges Assessment

This paper presents a new design architecture for advanced logic SRAM cells using six vertical transistors (with carrier transport along the Z direction), stacked one on top of each other. Virtual ...

Kioxia shows 3D memory innovation with ultra-low off-current transistors

Kioxia says it has developed highly stackable oxide-semiconductor channel transistors capable of supporting high-density 3D ...
HotHardware

Intel Stacked Forksheet Transistor Patent Could Keep Moore's Law Going In The Angstrom Era

We've been measuring integrated circuit feature sizes in nanometers for years now, but some folks reading this are probably as old or older than yours truly, who can recall when we first talked about ...
HotHardware

Intel Demos Transistor Scaling Breakthroughs That Keep Moore's Law Alive And Well

Intel's upcoming RibbonFET technology is set to debut in the company's 20A node next year, but already the chip maker is showcasing the next step: 3D stacked CMOS (complementary metal oxide ...
Semiconductor Engineering

Stacked Nanosheets And Forksheet FETs

What comes next after gate-all-around FETs is still being worked out, but it likely will involve some version of stacked nanosheets. The design of advanced transistors is a tradeoff. On one hand, it ...
Design-Reuse

imec looks to process flow for sub-nm stacked CFET transistors

"Today, the semiconductor industry is in a transition period from FinFET to Nanosheet, a device architecture that will extend the roadmap with multiple logic technology generations," said Hans Mertens ...
Electronic Design

Intel Proposes New Path for Moore's Law With 3D Stacked Transistors

Intel CEO Pat Gelsinger has announced plans to recover the company's chip-making crown by 2025. But the company has shared more details about research that could help it compete even further in the ...
Hackaday

Transistor Logic Clock Gets Stacked Up

A couple years back we covered a very impressive transistor logic clock which was laid out so an observer could watch all of the counters doing their thing, complete with gratuitous blinkenlights. It ...
Business Wire

Tezzaron Announces World’s First Eight-Layer Active Wafer Stack

SENDAI, Japan--(BUSINESS WIRE)--Today at the IEEE 3DIC conference, Tezzaron Semiconductor and their manufacturing subsidiary, Novati Technologies, announce the world’s first eight-layer 3D IC wafer ...
Gizmochina

Sony makes breakthrough in stacked image sensor technology

Additionally, since the amp transistor size can be increased with this tech, noise during dark scenarios is also reduced. Last but not least, Sony states that its stacked CMOS image sensor technology ...